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Rechnerarchitektur und Eingebettete Systeme MOC

Rechnerarchitektur und Eingebettete Systeme MOC

Dec 06, 20251 min read

  • map
  • uni/EmbeddedSystems

Slides

Lecture0_Orga-0.pdf
Lecture1_Introduction-0.pdf
Lecture2_Combinational_Logic-0.pdf
Lecture3_Sequential_Logic-0.pdf
Lecture4_Finite_State_Machines-0.pdf
Lecture5_Arithmetic-0.pdf
Lecture6_Assembly-0.pdf
Lecture7_Instruction_Format-0.pdf
Lecture8_processor_1-0.pdf
Lecture9_processor_2-1 1-0.pdf
Lecture10_pipelining-1 1-0.pdf
Lecture11_SW_to_HW-0.pdf
Lecture12_HWSW_CoDesign_Concepts-0.pdf
Lecture13_HWSW_CoDesign_Synthesis-0.pdf
Lecture14_GPU_Future_of_Computer_Arch-0.pdf

Notes

Computer
Computer Architecture
Das von-Neumann Prinzip
Programmiersprachen
RISC V
Moore‘s Law

Boolische Logik
Hardware Description Languages
Finite State Machine

RISC V Instruction Format
RISC V Implementation
Processor Performance
Pipelining

Compiling

Data Flow Graph

Tutoirum

installing_Digisim-0.pdf
bin2bcd-0.pdf

UE

Digital_ALU-0.pdf
bin2bcd-1-0.pdf
Embedded UE 1

ISS_DIY-0.pdf
riscv-unprivileged-1-0.pdf
RISCV_CARD.pdf
http://stroby.duckdns.org:44820/?folder=/home/stroby/dev/embedded_systems

Klausur

RISC V Implementation
RISC V Impelmentation.excalidraw

Embedded Auswendig lernen


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  • Klausur

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